Wafer inspection systems are often used to analyze wafers (or “dies”) in order to determine the presence of potential defects. A typical wafer inspection system will generate an image of the die to be analyzed and compare this image to a reference image, which may be taken from a database or the image of another die in the series. The comparison of the two images may be accomplished by several methods, but some form of subtraction is typical. However, the quality of the comparison on the accuracy of the registration of the images, that is to say the ability to sample the two images at nearly identical points. Therefore, it is highly desirable to create systems and methods for the run-time alignment of the sampled locations on a wafer in order to optimize the sensitivity of the wafer inspection system.
The type and geometry of the sensor used to sample a die (i.e. to generate an image of the die) influences the accuracy of the sampling as well as the resistance of the wafer inspection system to errors such as vibration, air currents, and illumination source drift. The noise tolerance is related to the exposure time as well as the time required to capture the data; the higher the bandwidth of a run-time alignment system, the higher the frequency of misalignment errors that can be compensated by the system. For example, the noise tolerance of a two-dimensional sensor (e.g. a CCD camera) is related to the exposure time; the noise tolerance of a 1D sensor is related to the line rate; and the noise tolerance of spot scanning architectures is related to the pixel sampling rate. Spot scanning architectures are therefore capable of producing high quality images with little blur, provided that adequate compensation systems with sufficient bandwidth correction are in place.